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PICDEM TM Lab Development Board User’s Guide
3.4.5
3.4.5.1
Lab 6: Push Button Interrupt
NEW REGISTERS USED IN THIS LAB
To configure the peripherals used in this lab, the following registers are used:
1. OPTION Register: OPTION (Register 2-2 in Section 2 of the PIC16F690 Data
Sheet)
- Selects the edge transition on RA2/INT that will trigger an interrupt.
2. Interrupt Control Register: INTCON (Register 2-3 in Section 2 of the PIC16F690
Data Sheet)
- Enable interrupt functionality on the PIC16F690.
- Enables the RA2/INT external interrupt.
- Contains a flag that indicates the external interrupt has occurred.
3.4.5.2
OVERVIEW
This lab expands upon Lab 5 by adding an interrupt that will occur each time the push
button connected to the RA2 pin is pressed.
As mentioned, polling a bit is heavily reliant on a number of factors such as the size of
the firmware and the timing of the software control loop. Polling does have its uses.
However, there may be times when an event, such as pressing a push button, requires
immediate attention. This is where the interrupt comes in. As the name implies, an
interrupt acts as a sort of alarm. When the Central Processing Unit receives an inter-
rupt, it immediately stops what it is doing, saves where in the code it was before the
interrupt, performs code or firmware defined by the user in the event of an interrupt
called an Interrupt Service Routine (ISR), and then returns to the previous task it was
performing prior to the interrupt.
So, why not use interrupts all the time? The answer is mainly cost. In order to
implement an interrupt for a specific function, the user may need to purchase a micro-
controller with a peripheral that accommodates the interrupt. This increases the cost of
the application. In some cases, polling a bit may be the way to go. Other cases may
require the interrupt thereby justifying the added cost of a particular peripheral.
The RA2 pin associated with the PORTA register features an external edge-triggered
interrupt capability (note the INT designation on the PIC16F690 Pin Diagram in Table
5 of the data sheet). The interrupt is configurable to occur on either the rising-edge (i.e.,
signal on RA2 pin transitions from low-to-high) or the falling-edge (i.e., signal on RA2
pin transitions from high-to-low) of the voltage on the RA2 pin. If the selected edge tran-
sition is detected on RA2, the CPU then services the interrupt before returning to the
code it was executing prior to the interrupt. Referring again to Figure 3-12, the push
button connected to the RA2 pin is pulled high when not pressed. Therefore, the inter-
rupt will be configured to trigger on the high-to-low transition indicating a push button
press.
The INTCON register contains the enable (INTE) and flag (INTF) bits for the RA2
external interrupt. These bits indicate to firmware the condition that caused an interrupt
to occur. The other bits and accompanying registers are used for other peripheral
features on the microcontroller. The Global Interrupt Enable bit (GIE) is a sort of master
switch that allows interrupts, if individually enabled, to be used by the microcontroller.
The OPTION register features the Interrupt Edge Select (INTEDG) bit that will be used
to indicate the edge transition that will trigger an interrupt.
DS41369A-page 48
? 2009 Microchip Technology Inc.
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